SAMIRA: A SIMD-DSP architecture targeted to
the MatlabTM source language

Outline

The DSP Design Challenge

Degree of Efficiency

1st Step: Exploitation of Data-Level Parallelism

2nd Step: Exploitation of Instruction-Level Parallelism

Integrated Design Flow

Compiler Architecture

Generic Processing Element

Distributed Decoding

Example Configuration 1

Example Configuration 2

Proposed System Architecture

SAMIRA Architecture

Conflict-Free Access of Stride-Permutations

SAMIRA: Scalar Part

SAMIRA: Vector Part

Implementation Results

Power Consumption: TP-Product

Peak Performance (100% Utilization)

Conclusions & Further Work

"Thank you for your attention"